*
*
*      AT EACH IRQ INTERRUPT, MOVE IRQ INTERRUPT COUNT
*      AND STRING 'Interupt!' to PORT B
*
*
RAMStart     EQU  $0040
RomStart     EQU  $E000
VectorStart  EQU  $FFDC

$Include 'gpgtregs.inc'

               

             ORG     RAMStart
IRQINTCOUNT  DS      1       ; IRQ Interrupt counter
OTHERSCOUNT  DS      1       ; Other Interrupts counter
SOURCE       FCB     'Interrupt!'
             FCB     0

             ORG     RomStart


; - GPIO_INIT ------------------------------------------------------------------------------
; all-gpios initialisation - type: output, state: log.1, pullups-off
gpio_init:
             lda     #$FF
             sta     PTA
             sta     PTB
             sta     PTC
             sta     PTD
             sta     PTE
             sta     DDRA
             sta     DDRB
             sta     DDRC
             sta     DDRD
             sta     DDRE
             clra
             sta     PTAPUE
             sta     PTCPUE
             sta     PTDPUE
             rts
;- GPIO_INIT --------------------------------------------------------------------------------

;- MAIN --------------------------------------------------------------------------------
; Everything begins here
Main:
             rsp                     ; stack pointer reset
             clrx                    ; clear X register
             clra                    ; register init
             sta     IRQINTCOUNT     ; clear IRQ interrupt counter
             sta     OTHERSCOUNT     ; clear other interrupts counter
             mov     #$31,CONFIG1    ; MCU runs w/o LVI and COP support
             bsr     gpio_init       ; GPIO initialization
*
*            SOFTWARE INTERUPTS
*            NON-MASKABLE : IT WORKS ALWAYS, IT DOES NOT CHECK INTERUPT BIT I IN CCR
*             
            
             swi                     ; Software interrupt
             nop
             swi                     ; Software interrupt
             nop
*
*            ENABLE INTERUPTS
*            TO CATCH INTERUPT, THE INTERUPT BIT I IN CCR SHOULD BE CLEAR
*             
             cli                     ; Interrupts enabled             
             
main_loop:
             bra     main_loop       ; runs infinitely
;- MAIN -------------------------------------------------------------------------------------

*
*       Input IRQ 1 and IRQ 0 from status window to generate an interrupt on simulator
*
*       Check the stack address to see what data is stored on the stack
*

;- IRQ_ISR --------------------------------------------------------------------------------
; Dummy interrupt handler - these interrupt requests will normaly never be activated, but..

irq_isr:
             pshh                     ; Push H register onto the stack
             inc      IRQINTCOUNT     ; Increment IRQ Interupt counter
             mov      IRQINTCOUNT,PTB ; Store IRQ Count at Port B
             
             clrx                     ; Increment X pointer to next byte location
loop:        lda      SOURCE,X        ; Fetch data byte from source address
             sta      PTB             ; Write data byte to PORT B
             beq      done            ; If data byte moved = zero, go to DONE
             incx                     ; Increment X pointer to next byte location
             bra      loop
             
done:        pulh                     ; Pul H register from stack                       
             rti                      ; Return from interrupt
;- IRQ_ISR --------------------------------------------------------------------------------

;- DUMMY_ISR --------------------------------------------------------------------------------
; Dummy interrupt handler - these interrupt requests will normaly never be activated, but..

dummy_isr:
       pshh                     ; Push H register onto the stack
       inc      OTHERSCOUNT     ; Increment Other Interupt counter
       pulh                     ; Pul H register from stack  
       rti
;- DUMMY_ISR --------------------------------------------------------------------------------


;- INTERRUPT VECTOR TABLE -------------------------------------------------------------------
        org  VectorStart
        dw  dummy_isr    ; Time Base Vector
        dw  dummy_isr    ; ADC Conversion Complete
        dw  dummy_isr    ; Keyboard Vector
        dw  dummy_isr    ; SCI Transmit Vector
        dw  dummy_isr    ; SCI Receive Vector
        dw  dummy_isr    ; SCI Error Vector
        dw  dummy_isr    ; SPI Transmit Vector
        dw  dummy_isr    ; SPI Receive Vector
        dw  dummy_isr    ; TIM2 Overflow Vector
        dw  dummy_isr    ; TIM2 Channel 1 Vector
        dw  dummy_isr    ; TIM2 Channel 0 Vector
        dw  dummy_isr    ; TIM1 Overflow Vector
        dw  dummy_isr    ; TIM1 Channel 1 Vector
        dw  dummy_isr    ; TIM1 Channel 0 Vector
        dw  dummy_isr    ; PLL Vector
        dw  irq_isr      ; ~IRQ1 Vector
        dw  dummy_isr    ; SWI Vector
        dw  main         ; Reset Vector
;- INTERRUPT TABLE --------------------------------------------------------------------------
            
                        
